Comparing NLDM And CCS delay models

Post date: Sep 19, 2014 10:01:08 PM

NLDM Driver Model

NLDM driver model characterizes input-to-output delay and output transition times with sensitivity to input transition time, output load and side input states. These characteristics are obtained using a circuit simulator with appropriate stimulus to cause output transition. Input stimulus along with input/output measurement/capture points are shown in the picture below.

As seen in the picture, characterization software like guna measure and captures 3 points on sides of active input and active output. These three points are called delay and transition time thresholds. Difference between input delay threshold and output delay threshold is modeled as cell delay and difference between lower and upper transition times on output port is modeled as output transition time. These two parameters - delay and transition times are used to synthesize NLDM driver model shown in the picture below:

NLDM Receiver Model

NLDM receiver model is simply a single capacitor for the entire transition with no sensitivity.

Shortcomings of NLDM model

NLDM only captures 3 output points, which is not sufficient to reflect non-linearities of circuits at lower geometries (65nm and below) in synthesized driver model during static timing analysis. Classical case of this insufficiency is when driver resistance is order of magnitude less than the impedance of net it is driving (Rd << Znet). Driver model requires more granularity in driver model. CCS timing model eliminate need for this synthesis and hence is able to achieve higher accuracy than NLDM.

Other significant shortcoming of NLDM is in the receiver model. NLDM receiver model fails capture miller effect. This effects dominates delay calculation of STA for very small impedance nets.

CCS Driver Model

CCS driver model is characterized by capturing current waveform flowing into the load capacitor of the cell. CCS driver model also has sensitivity to input transition time, output load and side input states. CCS driver model is essentially a current source with infinite driver resistance, hence it provides better accuracy in cases where net impedance is very very high. Note, CCS timing model does not require synthesis of driver model, captured current waveform is driver model itself.

CCS Receiver Model

CCS receiver model is characterized much like NLDM receiver model with additional granularity to reflect sensitivities like miller capacitance, state of side inputs, input transition times and output load. To accurately reflect effect of miller capacitance on input capacitance and net-delay, it is divided into two parts - C1 and C2. For STA delay calculation, C1 is used in net delay calculation before receiver waveform hits delay threshold point and C2 is used in net delay calculation after receiver waveform hits delay threshold point.

Summary

In this article, we introduced timing model of a VLSI cell. We discussed NLDM (Non Linear Delay Model) of a cell used in STA. In later section, we highlighted shortcomings of NLDM for advanced nodes and CCS (Composite Current Source) as one solution to address them.

Related Blogs

1. Translating CCS timing model into ECSM timing model and vice-versa
2. CCS Timing Model vs ECSM Timing Model
3. Miller Capacitance Characterization
4. Current Source Models: Historical Perspective